Junsung Kim
Hi! I am currently a fifth-year Ph.D. student in the Department of Electrical and Electronic Engineering at Yonsei University, advised by Prof. Won Woo Ro. My research interests lie in GPU architecture and memory systems. Currently, my work focuses on designing efficient architectural and system support for emerging AI and HPC applications running on multi-GPU, MCM-GPU, and wafer-scale platforms.
Research Interests
- Computer Architecture
- Performance Modeling and Simulation Methodology
- GPU and Accelerator Architecture
- GPU Memory Systems, UVM, Address Translation, MMU, and Cache
- Multi-GPU, MCM GPU, Wafer-scale Systems
Email: junsung.kim@yonsei.ac.kr
Education
-
Yonsei UniversityPh.D. student in Electrical and Electronic Engineering, 2022 - PresentAdvisor: Prof. Won Woo Ro
-
Yonsei UniversityB.S. in Electrical and Electronic Engineering, 2016 - 2022
Research Experience
-
University of California, San Diego (UCSD)Visiting Scholar in Computer Science & Engineering, Feb. 2025 - Feb. 2026Advisor: Prof. Yufei Ding
Publications
ArXiv
AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving
arXiv preprint arXiv:2604.26103, 2026
ISCA'26
(To appear) Reducing Page Faults via Invalidation-based Mapping Propagation in Multi-GPU Systems
International Symposium on Computer Architecture (ISCA), 2026
ISCA'26
(To appear) MXFP: Microscaling Flexible Floating Point Format for Large-Scale AI Model Acceleration
International Symposium on Computer Architecture (ISCA), 2026
ICCD'25
PIMFY: Eliminating Remote Page Walks in MCM GPUs
The 43rd International Conference on Computer Design (ICCD), November 2025
JSA'24
SHREG: Mitigating register redundancy in GPUs
Journal of Systems Architecture (JSA), July 2024
ISPASS'23
Early-Adaptor: An Adaptive Framework for Proactive UVM Memory Management
International Symposium on Performance Analysis of Systems and Software (ISPASS), April 2023
Technical Skills
- Programming Languages: Go, C/C++, Python, CUDA, Verilog HDL
- Development Tools: MGPUSim, Accel-sim, GPGPU-Sim, Gem5
- Research Workflow: performance analysis, simulator modification, experimental automation, trace analysis
Industry Projects
-
Develop a Framework for CPU Performance Exploration
-
Development of a Memory-Centric Architecture Based on Reconfigurable PIM Devices
-
Development of a Large-Scale Parallel Processing Unit Architecture for Supercomputer CPUs
Teaching Experience
-
EEE4473 Embedded System Lab.
-
EEE3535 Operating Systems
Honors and Awards
-
Academic Honors
-
Grand Prize in AIM Conference